About us
AzurEngine has developed an innovative processor architecture called RPP (Reconfigurable Parallel Processor), which bridges the gap of programmability and power efficiency between GP-GPU and ASIC (TPU/NPU).
RPP is a high-performance, efficient, and compatible chip solution for parallel computing at the edge and in the data center.
Co-founder
Our Team
AzurEngine is led by international teams with outstanding R&D and management experience.
Li Yuan
Co-founder/CEO
- Bachelor of Tsinghua University Ph.D., Kyoto University, Japan Postdoctorate at McMaster University
- Proficient in chip architecture design, with many years of experience in international business and technology management
- Responsible for the entire chain management of multiple complex chip projects from product definition to mass production to commercial use. He has international professional team management experience.
- Successfully led the team to complete the research and development of mobile phone chips at TI and participated in the formulation of relevant international communication standards
- Responsible for the chip system architecture and software and hardware development of the Intel data center department. During the tenure, he successfully developed the Xeon CPU server system.
Zhu Jianbin
Co-founder/Vice President of Technology
- Years of TI/Intel/Mindspeed design and development experience
- Master of Beijing University of Technology
- Senior project management, chip/software design experience
development path
Road map
2020
- R8 tapeout
2018
- Complete Pre-A round of financing
- Signed a strategic cooperation agreement with Top500 Semiconductor Group
2016
- RPP architecture shaping
- American company formation
2019
- Develop and test core power demonstration system
- Complete multiple deep learning use cases
2017
- Complete patent registration
- Get angel round investment
2011
- RPP architecture concept
2020
- R8 tapeout
2019
- Develop and test core power demonstration system
- Complete multiple deep learning use cases
2017
- Chinese company establishment
- Complete patent registration
- Get angel round investment
2018
- Complete Pre-A round of financing
- Signed a strategic cooperation agreement with Top500 Semiconductor Group
2016
- RPP architecture shaping
- American company formation
2011
- RPP architecture concept
Development Goals
Short-term goals
Building cost-effective, low power consumption and high-performance chip products with software and hardware for various industries customers and do our best to create command value.
Long-term goals
Become a leader in the filed of GP-GPU