About us

AzurEngine has developed an innovative processor architecture called RPP (Reconfigurable Parallel Processor), which bridges the gap of programmability and power efficiency between GP-GPU and ASIC (TPU/NPU).

RPP is a high-performance, efficient, and compatible chip solution for parallel computing at the edge and in the data center.

 

Co-founder

Our Team

AzurEngine is led by international teams with outstanding R&D and management experience. 

Li Yuan

Co-founder/CEO

Zhu Jianbin

Co-founder/Vice President of Technology

development path

Road map

2020
2018
2016
2019
2017
2011
2020
2019
2017
2018
2016
2011

Development Goals

Short-term goals

Building cost-effective, low power consumption and high-performance chip products with software and hardware for various industries customers and do our best to create command value. 

Long-term goals

Become a leader in the filed of GP-GPU